Jie Zhao

Jie Zhao is a Full Professor at the College of Computer Science and Electronic Engineering, Hunan University, where he leads the CYCLE Lab. He has established strong relationships with major technology companies, including Huawei Technologies, Alibaba Group, and ByteDance, as well as innovative startups like Stream Computing Co., Ltd. Jie Zhao earned his PhD under the supervision of Prof. Albert Cohen from PARKAS, a research group affiliated with the Département d’Informatique at École Normale Supérieure and INRIA Paris. Education & Experience details more about his academic and industrial careers. Jie Zhao’s research interests focus on building intelligent software systems, with an emphasis on machine learning systems, polyhedral compilers, numerical program analysis, and high-level synthesis. Research provides a comprehensive overview of his research topics, funding, honors, and awards. His scholarly contributions are listed under Publications, and his open-source work can be explored through Projects & Repositories. Jie Zhao also maintains a personal website in Chinese, which can be accessed at his homepage at Hunan University.

news

Mar 24, 2026	One paper titled “A Decoupled Analytical Model for Tile Size Selection in Affine Programs” has been accepted by ACM TACO 2026.
Feb 27, 2026	One paper titled “LLM-Based Automatic Architecture Optimization for AI Model HLS Implementation on FPGA” has been accepted by DAC 2026.
Dec 23, 2025	One paper titled “Dual-Pronged Deep Learning Preprocessing on Heterogeneous Platforms with CPU, Accelerator and CSD” has been accepted by IEEE TC 2025.

selected publications

TOCS 2024

Modeling the Interplay between Loop Tiling and Fusion in Optimizing Compilers Using Affine Relations

Jie Zhao, Jinchen Xu, Peng Di, Wang Nie, Jiahui Hu, Yanzhi Yi, Sijia Yang, Zhen Geng, Renwei Zhang, Bojie Li, Zhiliang Gan, and Xuefeng Jin

ACM Trans. Comput. Syst., Jan 2024

Bib PDF

@article{basteln,
  author = {Zhao, Jie and Xu, Jinchen and Di, Peng and Nie, Wang and Hu, Jiahui and Yi, Yanzhi and Yang, Sijia and Geng, Zhen and Zhang, Renwei and Li, Bojie and Gan, Zhiliang and Jin, Xuefeng},
  title = {Modeling the Interplay between Loop Tiling and Fusion in Optimizing Compilers Using Affine Relations},
  year = {2024},
  issue_date = {November 2023},
  publisher = {Association for Computing Machinery},
  address = {New York, NY, USA},
  volume = {41},
  number = {1--4},
  issn = {0734-2071},
  url = {https://doi.org/10.1145/3635305},
  doi = {10.1145/3635305},
  journal = {ACM Trans. Comput. Syst.},
  month = jan,
  articleno = {5},
  numpages = {45},
  keywords = {optimizing compilers, polyhedral model, memory hierarchy, redundant computation, parallelism, data locality, fusion, Tiling}
}

OSDI 2023

Effectively Scheduling Computational Graphs of Deep Neural Networks toward Their Domain-Specific Accelerators

Jie Zhao, Siyuan Feng, Xiaoqiang Dan, Fei Liu, Chengke Wang, Sheng Yuan, Wenyuan Lv, and Qikai Xie

In Proceedings of the 17th USENIX Symposium on Operating Systems Design and Implementation (OSDI 23), Jul 2023

Bib PDF Slides

@inproceedings{graphturbo,
  author = {Zhao, Jie and Feng, Siyuan and Dan, Xiaoqiang and Liu, Fei and Wang, Chengke and Yuan, Sheng and Lv, Wenyuan and Xie, Qikai},
  title = {Effectively Scheduling Computational Graphs of Deep Neural Networks toward Their Domain-Specific Accelerators},
  booktitle = {Proceedings of the 17th USENIX Symposium on Operating Systems Design and Implementation (OSDI 23)},
  year = {2023},
  isbn = {978-1-939133-34-2},
  address = {Boston, MA},
  pages = {719--737},
  url = {https://www.usenix.org/conference/osdi23/presentation/zhao},
  publisher = {USENIX Association},
  month = jul,
}

MLSys 2022

Apollo: Automatic Partition-based Operator Fusion through Layer by Layer Optimization

Jie Zhao, Xiong Gao, Ruijie Xia, Zhaochuang Zhang, Deshi Chen, Lei Chen, Renwei Zhang, Zhen Geng, Bin Cheng, and Xuefeng Jin

In Proceedings of Machine Learning and Systems, Aug 2022

Bib PDF Slides

@inproceedings{apollo,
  author = {Zhao, Jie and Gao, Xiong and Xia, Ruijie and Zhang, Zhaochuang and Chen, Deshi and Chen, Lei and Zhang, Renwei and Geng, Zhen and Cheng, Bin and Jin, Xuefeng},
  booktitle = {Proceedings of Machine Learning and Systems},
  date-modified = {2022-02-19 09:27:32 +0800},
  editor = {Marculescu, Diana and Chi, Yuejie and Wu, Carole-Jean},
  pages = {1-19},
  month = aug,
  title = {Apollo: Automatic Partition-based Operator Fusion through Layer by Layer Optimization},
  volume = {4},
  year = {2022}
}

PLDI 2021

AKG: Automatic Kernel Generation for Neural Processing Units Using Polyhedral Transformations

Jie Zhao, Bojie Li, Wang Nie, Zhen Geng, Renwei Zhang, Xiong Gao, Bin Cheng, Chen Wu, Yun Cheng, Zheng Li, Peng Di, Kun Zhang, and Xuefeng Jin

In Proceedings of the 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation, Jun 2021

Bib PDF Slides

@inproceedings{akg,
  address = {New York, NY, USA},
  author = {Zhao, Jie and Li, Bojie and Nie, Wang and Geng, Zhen and Zhang, Renwei and Gao, Xiong and Cheng, Bin and Wu, Chen and Cheng, Yun and Li, Zheng and Di, Peng and Zhang, Kun and Jin, Xuefeng},
  booktitle = {Proceedings of the 42nd ACM SIGPLAN International Conference on Programming Language Design and Implementation},
  isbn = {9781450383912},
  numpages = {16},
  month = jun,
  pages = {1233--1248},
  publisher = {Association for Computing Machinery},
  series = {PLDI'21},
  title = {AKG: Automatic Kernel Generation for Neural Processing Units Using Polyhedral Transformations},
  url = {https://doi.org/10.1145/3453483.3454106},
  year = {2021},
  bdsk-url-1 = {https://doi.org/10.1145/3453483.3454106}
}

MICRO 2020

Optimizing the Memory Hierarchy by Compositing Automatic Transformations on Computations and Data

Jie Zhao, and Peng Di

In Proceedings of the 53rd IEEE/ACM International Symposium on Microarchitecture, Virtual Event, Athens, Greece, Oct 2020

Bib PDF Slides

@inproceedings{polytef,
  address = {Piscataway, NJ, USA},
  author = {Zhao, Jie and Di, Peng},
  booktitle = {Proceedings of the 53rd IEEE/ACM International Symposium on Microarchitecture},
  doi = {10.1109/MICRO50266.2020.00044},
  location = {Virtual Event, Athens, Greece},
  numpages = {15},
  pages = {427--441},
  month = oct,
  publisher = {IEEE Press},
  series = {MICRO-53},
  title = {Optimizing the Memory Hierarchy by Compositing Automatic Transformations on Computations and Data},
  url = {https://www.microarch.org/micro53/papers/738300a427.pdf},
  year = {2020},
  bdsk-url-2 = {https://doi.org/10.1109/MICRO50266.2020.00044}
}